NAND FLASH memory is electrically organized as a plurality of blocks of physical memory on a die (chip), and a plurality of dies may be incorporated into a package, which may be termed a FLASH memory circuit. The chip may have more than one plane, each plane configured so as to be separately addressable for erase, write and read operations. A block is comprised of a plurality of pages, and the pages may be comprised of a plurality of sectors. Some of this terminology is a legacy from hard disk drive (HDD) technology; however, as used in FLASH memory devices, some adaptation is made, as would be understood by a person of skill in the art.
NAND FLASH memory is characterized in that data may be written to a sector of memory, or to a contiguous group of sectors comprising a page. Pages can be written in sequential order within a block, but if page is omitted, the present technology does not permit writing to the omitted page until the entire block has been erased. This contrasts with disk memory where a change to data in a physical memory location may be made by writing to that location, regardless of the previous state of the location. A block is the smallest extent of FLASH memory that can be erased, and a block must be erased prior to being written (programmed) with data.
Earlier versions of NAND FLASH had the capability of writing sequentially to sectors of a page, and data may be written on a sector basis where the die architecture permits this to be done. More recently, memory circuit manufacturers have been evolving the device architecture so that one or more pages of data may be written in a write operation. This includes implementations where the die has two planes and the planes may be written to simultaneously. All of this is by way of saying that the specific constraints on reading or writing data may be device dependent, but the overall approach disclosed herein may be easily adapted by a person of skill in the art so as to accommodate specific device features. The terms “erase” and “write” in a FLASH memory have the characteristic that when an erase or a write operation is in progress, a plane of the FLASH memory chip on which the operation is being performed is not available for “read” operations to any location in a plane of the chip. Any other memory type with similar characteristics may be substituted
One often describes stored user data by the terms sector, page, and block, but there is additional housekeeping data that is also stored and which must be accommodated in the overall memory system design. Auxiliary data such as metadata, error correcting codes and the like that are related in some way to stored data is often said to be stored in a “spare” area. However, in general, the pages of a block or the block of data may be somewhat arbitrarily divided into physical memory extents that may be used for data, or for auxiliary data. So there is some flexibility in the amount of memory that is used for data and for auxiliary data in a block of data, and this is managed by some form of operating system abstraction, usually in one or more controllers associated with a memory chip, or with a module that includes the memory chip. The auxiliary data is stored in a spare area which may be allocated on a sector, a page, or a block basis.
The management of reading of data, writing of data, and the background operations such as wear leveling and garbage collection, are performed by a controller, using an abstraction termed a flash translation layer (FTL) that maps logical addresses, as understood by the user, to the physical addresses of the memory where the data values are actually stored. The generic details of a FTL are known to a person of skill in the art and are not described in detail herein. The use of a FTL or equivalent is assumed, and this discussion takes the view that the abstraction of the FTL is equivalent of mapping an address of a page of user data to a physical memory location. The location may be a page of a block. This is not intended to be a limitation, but such an assumption simplifies the discussion herein.
A snapshot is used in, for example, data base systems (DBS) to freeze the values of an existing set of stored data at the time of the snapshot. The frozen data copy may be used, for example, for backup, study purposes, regression analysis, quality assurance, or the like. But, the operation of the data base or other program that created the frozen memory image continues, and changes to the user dynamic data need to be accommodated as transparently as possible to the user while the snapshot (frozen data) is being used for these other purposes. The time interval during which the snapshot is maintained is generally a user-determined parameter, but may also be defined in terms of the percentage of the frozen data image that has been obsoleted by changes to the dynamic data. The amount of memory needed to support the snapshot operation depends on the amount of the data that existed at the time of the snapshot that has been changed between the snapshot time and the time that the snapshot has been released. Releasing a snapshot, regardless of the specific terminology used, is the act or process of disassociating the data representing the snapshot from the dynamic data that has evolved since the time of the snapshot.
Since, in principle, all of the data present at the time that a snapshot has been initiated may be changed over a long enough period of time, the size of the memory used by a snapshot may ultimately equal that of the original data set. Generally, the time duration of a snapshot is sufficiently short that a smaller amount of memory may be used for each snapshot. A higher level system may monitor memory usage and manage the retention of snapshots based on a variety of criteria.